ATSs Qpedia Thermal eMagazine is pleased to be a Media Sponsor of the Electronics Thermal Week, co-sponsored by MEPTEC and SEMI-THERM. As part of that series, we are developing some posts around the speakers, issues and suppliers involved. This is our kick off article, an interview with David Copeland, the Keynote Speaker for The Heat is On MEPTEC Conference being held during Thermal Week.
David Copeland is a Thermal Engineer working in the Packaging Technology department of Oracle’s Microelectronics Group, developing packaging and cooling technology for UltraSPARC processors and the systems which use them. Areas of development include thermal interfaces, heat spreading materials, single-phase and phase-change liquid cooling, and data center cooling. He received his BS from Massachusetts Institute of Technology, MS from Stanford University and DrEng from Tokyo Institute of Technology, all in Mechanical Engineering.
David’s Keynote Topic is: Energy Reduction and Performance Maximization Through Improved Cooling. We had a chance to catch up with David on the phone, to ask him to let our readers know about why he chose his topic and what he hopes his listeners will take away from his presentation.
ATS: David, why did you choose this topic?
DAVID: Today, thermal engineers are given a semiconductor and told to maintain it at a certain temperature, 85 C or whatever, and I think this is true for those in other areas of thermal management as well, such as LED and Photovoltaic. Here’s a device or component, now create a thermal management solution that keeps the devices junction temperature at the specified point.
But now, it looks like temperature is being a variable rather than a constant. If you look at the International Technology Roadmap for Semiconductors, they have the high performance microprocessor junction temperature dropping from todays 95 C to 70 C by the year 2024. It’s only an average of 2 degrees per year decrease but taken as a whole, it’s a large drop that thermal professionals have to design to.
The other trend we are see is regarding power density. Power density may more than double over that same time frame of 2011 to 2024. So, as thermal engineering professionals, we are getting a bit constrained in terms of the higher power density and the lower head room.Now, if your environment is, say, a 45 degree C environment, that drops your head room down from 50 degrees to 25 degrees, so that’s exactly half the temperature differential. So the job has become somewhere on the order of 4 to 5 times more difficult.
The magnitude of the thermal resistance of the path from junction to ambient will have to go down by a factor of 4 to 5 over the next 15 years, which is not out of line with what has happened in the past 15 years, its just that our profession doesn’t currently have a lot of easily implementable solutions to get there.
The other thing we need to consider is microprocessor leakage current. The relative sensitivity of temperature to leakage current is becoming very strong. For example, in some process nodes you might have had to drop the temperature by 40 to 50 degrees in order to successfully cut the leakage power in half. And now that number is getting to be more like 20 to 25 degrees. So that means that the ability to make a given percentage cut in power consumption is slightly easier now with improved thermal management because you have to go down a lower temperature differential to get the same energy savings. Of course the concentrated Photovoltaic and LED lighting also have their own performance vs. temperature curves as well in terms of efficiency. Everything runs better when it’s cooler. But, how much cooler can you afford to make your device or system and still come out ahead; that’s the question.
