To maintain operation, the heat must flow out of a semiconductor as such a rate as to ensure acceptable junction temperatures. This heat flow encounters resistance as it moves from the junction throughout the device package, much like electrons face resistance when flowing through a wire. In thermodynamic terms, this resistance is known as conduction resistance and consists of several parts. From the junction, heat can flow toward the case of the component, where a heat sink may be located. This is referred to as ÎJC, or junction to case thermal resistance. Heat can also flow away from the top surface of the component and into the board. This is known as junction to board resistance, or Î˜JB.
Source: JESD51-2, Integrated Circuits Thermal Test Method – Natural Convection, JEDEC, March 1999.
Î˜JB is defined as the temperature difference between the junction and the board divided by the power when the heat path is from junction to board only. To measure Î˜JB, the top of the device is insulated and a cold plate is attached to the board edge (Figure 1). This is the true thermal resistance, which is the characteristic of the device. The only problem is that, in a real application one does not know how much power is being transmitted from different paths.
Due to the multiple heat transfer paths within a component, a single resistance cannot be used to accurately calculate the junction temperature. The thermal resistance from junction to ambient must be broken down further into a network of resistances to improve the accuracy of junction temperature prediction. A simplified resistor network is shown in Figure 2.
As board layouts become denser, there is a need to design optimized thermal solutions that use the least amount of space possible. Simply put, there is no margin to allow for over-designed heat sinks with tight component spacing. Accounting for the effect of board coupling is an important part of this optimization. The possibility for using an oversized heat sink exists only if the junction to case heat transfer path is considered.
To ensure a 105°C junction temperature at 55°C ambient a typical component (see Table 1) needs a heat sink resistance of 2.05°C/W (if we ignore board conduction). When board conduction is taken into account, the actual junction temperature could be as low as 74°C, assuming the board temperature is the same as the air temperature. This indicates a heat sink that is larger than necessary.
From this example, it is clear that all heat transfer paths from the component junction must be considered. Using just the Î˜JC and Î˜CA values can lead to a larger than optimal heat sink and may not accurately predict operating junction temperatures. Using the proposed correlation can also predict junction temperature when the board temperature is known from experimentation, as shown in Figure 3.