The methodology for compact thermal modeling of electrical components is described in the JEDEC standard, JESD15-1. A detailed model of both component and heat sink can be used for single component level analyses. Board and system level analyses require compact components to represent the thermal behavior of a component and to limit the amount of grid cells and related computer power. Our article discusses the methodology of compact heat sink modeling. We provide some modeling background then compare detailed, substitute and compact modeling. Please read the entire article at, “An Approach for Compact Heat Sink Modeling“
